TY - GEN
T1 - Efficient algorithms for finding highly acceptable designs based on module-utility selections
AU - Chantrapornchai, Chantana
AU - Sha, Edwin H.M.
AU - Hu, Xiaobo
PY - 1999
Y1 - 1999
N2 - In this paper, we present an iterative framework to solve module selection problem under resource, latency, and power constraints. The framework associates a utility measure with each module. This measurement reflects the usefulness of the module for a given a design goal. Using modules with high utility values will result in superior designs. We propose a heuristic which iteratively perturbs module utility values until they lead to good module selections. Our experiments show that the module selections formed by combinations of modules with high utility values are superior solutions. Further, by keeping modules with high utility values, the module exploration space can drastically be reduced.
AB - In this paper, we present an iterative framework to solve module selection problem under resource, latency, and power constraints. The framework associates a utility measure with each module. This measurement reflects the usefulness of the module for a given a design goal. Using modules with high utility values will result in superior designs. We propose a heuristic which iteratively perturbs module utility values until they lead to good module selections. Our experiments show that the module selections formed by combinations of modules with high utility values are superior solutions. Further, by keeping modules with high utility values, the module exploration space can drastically be reduced.
UR - https://www.scopus.com/pages/publications/0033358351
M3 - 会议稿件
AN - SCOPUS:0033358351
SN - 0769501044
T3 - Proceedings of the IEEE Great Lakes Symposium on VLSI
SP - 128
EP - 131
BT - Proceedings of the IEEE Great Lakes Symposium on VLSI
PB - IEEE
T2 - Proceedings of the 1999 9th Great Lakes Symposium on VLSI (GLSVLSI '99)
Y2 - 4 March 1999 through 6 March 1999
ER -