Dynamic budgeting for settling DRAM contention of co-running hard and soft real-time tasks

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

20 Scopus citations

Abstract

In modern non-customized multicore architectures, computing cores commonly share large parts of the memory hierarchy. This paper presents a scheme for controlling the sharing of main memory among cores, respectively the concurrently executing real-time tasks. This is important for the following: concurrent memory accesses are served sequentially by the memory controller. As task execution stalls until memory fetches are served, the latter significantly contributes to the execution time of the tasks. With multiple real-time tasks concurrently competing for the access to the memory, the main memory can easily become the Achilles heel for the timing correctness of the tasks. To provide hard timing guarantees, release of access requests issued to the main memory has therefore to be controlled. Run-time budgeting is a well accepted technique for controlling and coordinating the use of a shared resource, particularly when the underlying hardware cannot be altered. Whilst guaranteeing timing correctness of the hard real-time applications, worst-case based resource budgeting commonly leads to performance degradations of the co-running (so called soft real-time) applications. In this paper we propose to combine worst-case based resource budgeting with run-time monitoring for dynamically reconfiguring the budget schemes. Thereby we aim at increasing the responsiveness of the soft real-time applications, while satisfying the strict timing constraints of the co-running hard real-time tasks. We have implemented the proposed scheme in a microkernel and present its empirical evaluation for which an industrial benchmark suite has been employed.

Original languageEnglish
Title of host publication2014 International Conference on Engineering, Technology and Innovation
Subtitle of host publicationEngineering Responsible Innovation in Products and Services, ICE 2014
PublisherIEEE Computer Society
Pages151-159
Number of pages9
ISBN (Print)9781479940233
DOIs
StatePublished - 2014
Externally publishedYes
Event9th IEEE International Symposium on Industrial Embedded Systems, SIES 2014 - Pisa, Italy
Duration: 18 Jun 201420 Jun 2014

Publication series

NameProceedings of the 9th IEEE International Symposium on Industrial Embedded Systems, SIES 2014

Conference

Conference9th IEEE International Symposium on Industrial Embedded Systems, SIES 2014
Country/TerritoryItaly
CityPisa
Period18/06/1420/06/14

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