TY - JOUR
T1 - Design optimization and space minimization considering timing and code size via retiming and unfolding
AU - Zhuge, Qingfeng
AU - Xue, Chun
AU - Shao, Zili
AU - Liu, Meilin
AU - Qiu, Meikang
AU - Sha, Edwin H.M.
PY - 2006/6/6
Y1 - 2006/6/6
N2 - The increasingly complicated DSP processors and applications with strict timing and code size constraints require design automation tools to consider multiple optimizations such as software pipelining and loop unfolding, and their effects on multiple design parameters. This paper presents an Integrated Framework for Design Optimization and Space Minimization (IDOM) toward finding the minimum configuration satisfying timing and code size constraints. We show an effective way to reduce the design space to be explored through the study of the fundamental properties and relationships among retiming function, unfolding factor, timing, and code size. We present theorems to show that a small set of feasible unfolding factors can be obtained effectively to produce high-quality designs. The IDOM algorithm is proposed to generate a minimal configuration of the design by integrating software pipelining, unfolding, and code size reduction techniques. The experimental results on a set of DSP benchmarks show the efficiency and effectiveness of our technique.
AB - The increasingly complicated DSP processors and applications with strict timing and code size constraints require design automation tools to consider multiple optimizations such as software pipelining and loop unfolding, and their effects on multiple design parameters. This paper presents an Integrated Framework for Design Optimization and Space Minimization (IDOM) toward finding the minimum configuration satisfying timing and code size constraints. We show an effective way to reduce the design space to be explored through the study of the fundamental properties and relationships among retiming function, unfolding factor, timing, and code size. We present theorems to show that a small set of feasible unfolding factors can be obtained effectively to produce high-quality designs. The IDOM algorithm is proposed to generate a minimal configuration of the design by integrating software pipelining, unfolding, and code size reduction techniques. The experimental results on a set of DSP benchmarks show the efficiency and effectiveness of our technique.
UR - https://www.scopus.com/pages/publications/33646872185
U2 - 10.1016/j.micpro.2005.11.002
DO - 10.1016/j.micpro.2005.11.002
M3 - 文章
AN - SCOPUS:33646872185
SN - 0141-9331
VL - 30
SP - 173
EP - 183
JO - Microprocessors and Microsystems
JF - Microprocessors and Microsystems
IS - 4
ER -