Cycle-Aware Parallel Optimization for Mitigating ZZ Crosstalk on Quantum Hardware

ZZ crosstalk and decoherence hinder superconducting quantum computing. Mitigation strategies often require sequential gate execution, which restricts parallelism. We reformulate ZZ crosstalk mitigation as a parallel task scheduling problem by integrating quantum cycles and qubit interference. We then propose CYCO, a CYcle-aware ZZ Crosstalk Optimization algorithm, which uses a timing-based greedy strategy to schedule gates through cycles within quantum circuits. A novel data structure called Time and Distance Dependency Graph (TDDG) is designed to model gate dependencies and physical qubit distances. Based on TDDG, barrier punching is introduced to eliminate redundant synchronization barriers by merging independent gate groups, improving gate concurrency per cycle. Simulations show a reduction of up to 37.44% in quantum program cycle (14.19% on average) on 53- to 127-qubit NISQ devices, with up to 1.6 × higher parallelism than state-of-the-art methods. Real-device experiments demonstrate significant acceleration in quantum computing while maintaining fidelity.