TY - GEN
T1 - Code motion for migration minimization in STT-RAM based hybrid cache
AU - Li, Qingan
AU - Shi, Liang
AU - Li, Jianhua
AU - Xue, Chun Jason
AU - He, Yanxiang
PY - 2012
Y1 - 2012
N2 - Hybrid caches consisting of both STT-RAM andSRAM have been proposed recently for energy efficiency. Toexplore the advantages of hybrid cache, most work on hybridcaches employs migration based strategies to dynamically movewrite-intensive data from STT-RAM to SRAM. Migrations requireadditional read and write operations for data movementand may lead to significant overheads. To address this issue,this paper proposes a compilation method, Migration-awareCode Motion (MCM), to improve the energy efficiency andperformance of STT-RAM based hybrid cache. This methodis designed to change the data access patterns in memoryblocks such that the migration overhead is reduced without anyhardware modification. The experimental results show that theproposed method can reduce the number of migrations by 10.6%,reduce the dynamic energy by 6.2%, and reduce the total latency by 5.3% on average.
AB - Hybrid caches consisting of both STT-RAM andSRAM have been proposed recently for energy efficiency. Toexplore the advantages of hybrid cache, most work on hybridcaches employs migration based strategies to dynamically movewrite-intensive data from STT-RAM to SRAM. Migrations requireadditional read and write operations for data movementand may lead to significant overheads. To address this issue,this paper proposes a compilation method, Migration-awareCode Motion (MCM), to improve the energy efficiency andperformance of STT-RAM based hybrid cache. This methodis designed to change the data access patterns in memoryblocks such that the migration overhead is reduced without anyhardware modification. The experimental results show that theproposed method can reduce the number of migrations by 10.6%,reduce the dynamic energy by 6.2%, and reduce the total latency by 5.3% on average.
UR - https://www.scopus.com/pages/publications/84867792750
U2 - 10.1109/ISVLSI.2012.84
DO - 10.1109/ISVLSI.2012.84
M3 - 会议稿件
AN - SCOPUS:84867792750
SN - 9780769547671
T3 - Proceedings - 2012 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2012
SP - 410
EP - 415
BT - Proceedings - 2012 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2012
T2 - 2012 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2012
Y2 - 19 August 2012 through 21 August 2012
ER -
