Abstract
Transfer and output characteristics of fully-depleted polycrystalline silicon thin film transistors, including both tail and deep acceptor-like trap states in bulk, in the above-threshold region with low drain bias are presented under low or high state density in the situation without or with interface charge, respectively. The characteristics are calculated by a simple surface-potential-based drain current model in the strong inversion region with valid bias condition explained, and 2D-device simulation. The above-threshold region is found to be divided into Regions I and II, with Vsi, indicating the channel beginning to be completely strongly-inverted and large currents, and explication of deviations between the model and simulation in Region I. The large-traps effect on the range of Region I and Vth in the high state density situation is discovered.
| Original language | English |
|---|---|
| Pages (from-to) | 7463-7468 |
| Number of pages | 6 |
| Journal | IETE Journal of Research |
| Volume | 70 |
| Issue number | 9 |
| DOIs | |
| State | Published - 2024 |
Keywords
- Above-threshold (turn-on) region
- Characteristic
- Explication of deviations between the model and simulation in Region I
- Explication of model’s validity
- Fully-depleted polycrystalline silicon thin film transistor (FD poly-Si TFT)
- Large-traps effect
- Low drain bias
- Region division with bounds