ASIC design of UHF RFID reader digital baseband

Jing Liu; Yihao Chen; Bin Gu; Runxi Zhang; Feng Ran; Zongsheng Lai

doi:10.1109/PRIMEASIA.2010.5604910

ASIC design of UHF RFID reader digital baseband

Jing Liu^*
, Yihao Chen
, Bin Gu
, Runxi Zhang
, Feng Ran
, Zongsheng Lai

^*Corresponding author for this work

School of Communication and Electronic Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

5 Scopus citations

Abstract

This paper presents the ASIC design and implementation of digital baseband system for UHF RFID reader based on EPC Global C1G2/ISO 18000-6c protocol. The digital baseband system consists of two parts: transmitter and receiver, which inculing encoding module, decoding module, channel filers, CRC chenk module, control module and a SPI module. It is described in verilog HDL in RTL level, with Design Complier for synthesizing, PT for static timing analyzing and Astro for physical design. The die is fabricated using IBM 130nm 8-layer-metal RF cmos process successfully, which size is 3 mm × 3mm, the power consumption is around 6.7mW. It can be applied in the research of single-chip UHF RFID reader.

Original language	English
Title of host publication	PrimeAsia 2010 - 2nd Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics
Pages	263-266
Number of pages	4
DOIs	https://doi.org/10.1109/PRIMEASIA.2010.5604910
State	Published - 2010
Event	2nd Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics, PrimeAsia 2010 - Shanghai, China Duration: 22 Sep 2010 → 24 Sep 2010

Publication series

Name	PrimeAsia 2010 - 2nd Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics

Conference

Conference	2nd Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics, PrimeAsia 2010
Country/Territory	China
City	Shanghai
Period	22/09/10 → 24/09/10

Access to Document

10.1109/PRIMEASIA.2010.5604910

Cite this

Liu, J., Chen, Y., Gu, B., Zhang, R., Ran, F., & Lai, Z. (2010). ASIC design of UHF RFID reader digital baseband. In PrimeAsia 2010 - 2nd Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics (pp. 263-266). Article 5604910 (PrimeAsia 2010 - 2nd Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics). https://doi.org/10.1109/PRIMEASIA.2010.5604910

@inproceedings{e221042fa9674aca99d664d50e29cb33,

title = "ASIC design of UHF RFID reader digital baseband",

abstract = "This paper presents the ASIC design and implementation of digital baseband system for UHF RFID reader based on EPC Global C1G2/ISO 18000-6c protocol. The digital baseband system consists of two parts: transmitter and receiver, which inculing encoding module, decoding module, channel filers, CRC chenk module, control module and a SPI module. It is described in verilog HDL in RTL level, with Design Complier for synthesizing, PT for static timing analyzing and Astro for physical design. The die is fabricated using IBM 130nm 8-layer-metal RF cmos process successfully, which size is 3 mm × 3mm, the power consumption is around 6.7mW. It can be applied in the research of single-chip UHF RFID reader.",

author = "Jing Liu and Yihao Chen and Bin Gu and Runxi Zhang and Feng Ran and Zongsheng Lai",

year = "2010",

doi = "10.1109/PRIMEASIA.2010.5604910",

language = "英语",

isbn = "9781424467372",

series = "PrimeAsia 2010 - 2nd Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics",

pages = "263--266",

booktitle = "PrimeAsia 2010 - 2nd Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics",

note = "2nd Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics, PrimeAsia 2010 ; Conference date: 22-09-2010 Through 24-09-2010",

}

Liu, J, Chen, Y, Gu, B, Zhang, R, Ran, F & Lai, Z 2010, ASIC design of UHF RFID reader digital baseband. in PrimeAsia 2010 - 2nd Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics., 5604910, PrimeAsia 2010 - 2nd Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics, pp. 263-266, 2nd Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics, PrimeAsia 2010, Shanghai, China, 22/09/10. https://doi.org/10.1109/PRIMEASIA.2010.5604910

ASIC design of UHF RFID reader digital baseband. / Liu, Jing; Chen, Yihao; Gu, Bin et al.
PrimeAsia 2010 - 2nd Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics. 2010. p. 263-266 5604910 (PrimeAsia 2010 - 2nd Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - ASIC design of UHF RFID reader digital baseband

AU - Liu, Jing

AU - Chen, Yihao

AU - Gu, Bin

AU - Zhang, Runxi

AU - Ran, Feng

AU - Lai, Zongsheng

PY - 2010

Y1 - 2010

N2 - This paper presents the ASIC design and implementation of digital baseband system for UHF RFID reader based on EPC Global C1G2/ISO 18000-6c protocol. The digital baseband system consists of two parts: transmitter and receiver, which inculing encoding module, decoding module, channel filers, CRC chenk module, control module and a SPI module. It is described in verilog HDL in RTL level, with Design Complier for synthesizing, PT for static timing analyzing and Astro for physical design. The die is fabricated using IBM 130nm 8-layer-metal RF cmos process successfully, which size is 3 mm × 3mm, the power consumption is around 6.7mW. It can be applied in the research of single-chip UHF RFID reader.

AB - This paper presents the ASIC design and implementation of digital baseband system for UHF RFID reader based on EPC Global C1G2/ISO 18000-6c protocol. The digital baseband system consists of two parts: transmitter and receiver, which inculing encoding module, decoding module, channel filers, CRC chenk module, control module and a SPI module. It is described in verilog HDL in RTL level, with Design Complier for synthesizing, PT for static timing analyzing and Astro for physical design. The die is fabricated using IBM 130nm 8-layer-metal RF cmos process successfully, which size is 3 mm × 3mm, the power consumption is around 6.7mW. It can be applied in the research of single-chip UHF RFID reader.

UR - https://www.scopus.com/pages/publications/78650079906

U2 - 10.1109/PRIMEASIA.2010.5604910

DO - 10.1109/PRIMEASIA.2010.5604910

M3 - 会议稿件

AN - SCOPUS:78650079906

SN - 9781424467372

T3 - PrimeAsia 2010 - 2nd Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics

SP - 263

EP - 266

BT - PrimeAsia 2010 - 2nd Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics

T2 - 2nd Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics, PrimeAsia 2010

Y2 - 22 September 2010 through 24 September 2010

ER -

Liu J, Chen Y, Gu B, Zhang R, Ran F, Lai Z. ASIC design of UHF RFID reader digital baseband. In PrimeAsia 2010 - 2nd Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics. 2010. p. 263-266. 5604910. (PrimeAsia 2010 - 2nd Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics). doi: 10.1109/PRIMEASIA.2010.5604910

ASIC design of UHF RFID reader digital baseband

Abstract

Publication series

Conference

Access to Document

Other files and links

Fingerprint

Cite this