@inproceedings{03bb27d9c37d48c7ab388d544ec045ed,
title = "Application-Specific Interconnection Network Design in Clustered DSP Processors",
abstract = "To meet increasing performance requirements of DSP applications, application specific processor designs, e.g. function unit (FU) duplication and register file (RF) distribution, are widely used in the design of DSP processors. In this paper, an application specific approach is proposed for the design of interconnection network in such DSP processors. By extracting the scheduHng information of DSP applications, we decide the minimal number of required partially connected buses. Without impacting the performance and increasing the hardware cost, it provides optimized future scheduling {\~n}exibility. Our results show that reductions of 40\% in the number of required global buses and 60\% in wire segments can be achieved.",
keywords = "Clustered processors. Architecture, Interconnection network",
author = "\{Qun Xu\}, Cathy and Youtao' Zhang and Sha, \{Edwin H.M.\}",
note = "Publisher Copyright: {\textcopyright} PDCS 2003. All rights reserved.; 16th International Conference on Parallel and Distributed Computing Systems, PDCS 2003 ; Conference date: 13-08-2003 Through 15-08-2003",
year = "2003",
language = "英语",
series = "16th ISCA International Conference on Parallel and Distributed Computing Systems 2003, PDCS 2003",
publisher = "International Society for Computers and Their Applications (ISCA)",
pages = "69--75",
editor = "Seong-Moo Yoo and Youn, \{Hee Yong\}",
booktitle = "16th ISCA International Conference on Parallel and Distributed Computing Systems 2003, PDCS 2003",
address = "美国",
}