An efficient technique for chip temperature optimization of multiprocessor systems in the dark silicon era

In the dark silicon era, a fundamental problem is: given a real-time computation demand represented by a set of independent applications with their own power consumption, how to determine if an on-chip multiprocessor system is able to respond to this demand and maintain its reliability by keeping every core within the safe temperature range. In this paper, we first present a novel thermal model for the prediction of chip peak temperature assuming the application-to-core mapping is determined. The mathematical model combines linearized steady-state thermal model with empirical scaling factors to achieve significantly improved accuracy and running efficiency. Based on it, a MILP-based approach is presented to find the optimal application-to-core assignment such that the computation demand is met and the chip temperature is minimized. At last, if the minimized temperature still exceeds the safe temperature threshold, a novel heuristic algorithm, called temperature threshold-aware result handling (TTRH), is proposed to drop certain applications selectively from immediate execution, and lower the chip peak temperature to the safety threshold. Extensive performance evaluation shows that the MILP-based approach can reduce the chip peak temperature by 9.1 C on average compared to traditional techniques. TTRH algorithm can further lower the chip peak temperature by 1.38° C on average with the application dropping rate of less than 4.35%.