@inproceedings{43da5fe300234e7a93ad72b2acd59eba,
title = "An efficient rule-based OPC approach using a DRC tool for 0.18μm ASIC",
abstract = "The increasing complexity and data volume of VLSI designs demand an efficient optical proximity correction (OPC) technique. In this paper, we address the issues related to the gate bridge, which is serious in the subquarter micron technology, and the wide range of contact CD (Critical Dimension) variation. We present the efficient gate CD control method by introducing the critical area correction. In addition, the contact CD variation is reduced under the target CD range due to the combination of the contact biasing and the process calibration. The correction time and output data volume are drastically reduced by the hierarchical data manipulation using a DRC (Design Rule Check) tool, which basically exploits the characteristics of the design layers in ASIC's. The newly proposed incremental on-line violation filtering method also reduces the correction cycle time significantly.",
keywords = "CD, Critical area, DRC, OPC, Rule extraction",
author = "Park, \{Ji Soong\} and Park, \{Chul Hong\} and Rhie, \{Sang Uhk\} and Kim, \{Yoo Hyon\} and Yoo, \{Moon Hyun\} and Kong, \{Jeong Taek\} and Kim, \{Hyung Woo\} and Yoo, \{Sun Il\}",
year = "2000",
doi = "10.1109/ISQED.2000.838858",
language = "英语",
series = "Proceedings - International Symposium on Quality Electronic Design, ISQED",
publisher = "IEEE Computer Society",
pages = "81--85",
booktitle = "Proceedings of the IEEE 2000 1st International Symposium on Quality Electronic Design, ISQED 2000",
address = "美国",
note = "1st IEEE International Symposium on Quality Electronic Design, ISQED 2000 ; Conference date: 20-03-2000 Through 22-03-2000",
}