An efficient cache management scheme for capacitor equipped solid state drives

Congming Gao, Liang Shi, Yejia Di, Qiao Li, Chun Jason Xue, Edwin H.M. Sha

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

5 Scopus citations

Abstract

Within SSDs, random access memory (RAM) has been adopted as cache inside controller for achieving better performance. However, due to the volatility characteristic of RAM, data loss may happen when sudden power interrupts. To solve this issue, capacitor has been equipped inside emerging SSDs as interim supplier. However, the aging issue of capacitor will result in capacitance decreases over time. Once the remaining capacitance is not able to write all dirty pages in the cache back to flash memory, data loss may happen. In order to solve the above issue, an efficient cache management scheme for capacitor equipped SSDs is proposed in this work. The basic idea of the scheme is to bound the number of dirty pages in cache within the capability of the capacitor. Simulation results show that the proposed scheme achieves encourage improvement on lifetime and performance while power interruption induced data loss is avoided.

Original languageEnglish
Title of host publicationGLSVLSI 2018 - Proceedings of the 2018 Great Lakes Symposium on VLSI
PublisherAssociation for Computing Machinery
Pages463-466
Number of pages4
ISBN (Electronic)9781450357241
DOIs
StatePublished - 30 May 2018
Event28th Great Lakes Symposium on VLSI, GLSVLSI 2018 - Chicago, United States
Duration: 23 May 201825 May 2018

Publication series

NameProceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI

Conference

Conference28th Great Lakes Symposium on VLSI, GLSVLSI 2018
Country/TerritoryUnited States
CityChicago
Period23/05/1825/05/18

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