Abstract
This paper presents a picowatt voltage reference circuit using a voltage regulation scheme consisting of a self-regulation native N-type transistor, a double regulation topology formed by a stacked structure of two native N-type transistors, and a P-type transistor-based self-biased current source, to feed a diode-connected P-type load and a PNP transistor load. This improves the line sensitivity and the power supply rejection ratio (PSRR) without the use of an on-chip capacitor. The circuit is designed in a 180 nm CMOS process with an area of 13,700 μm2 and operates with a minimum supply voltage of 0.8 V. Post layout simulation results show that the circuit provides a constant output voltage of 160.2 mV with a temperature coefficient (TC) of 151.6 ppm/∘C from 0 to 100 ∘C, a line sensitivity of 0.00114%/V, a PSRR of -72.6 dB at 100 Hz, and an untrimmed voltage accuracy (σ/μ) of 0.99%.
| Original language | English |
|---|---|
| Pages (from-to) | 231-238 |
| Number of pages | 8 |
| Journal | Analog Integrated Circuits and Signal Processing |
| Volume | 118 |
| Issue number | 2 |
| DOIs | |
| State | Published - Feb 2024 |
| Externally published | Yes |
Keywords
- Bandgap
- Body biasing
- Line sensitivity
- Low power
- PSRR
- Voltage reference