A silicon BiCMOS single-chip UHF receiver design

A single-chip UHF receiver integrated with PLL working at ISM band from 290MHz to 470MHz is presented. It operates from a single 5V supply with a nominal current consumption of only 6.5 mA (with all parts of the receiver arc active). The IC requires only a low frequency reference clock (Crystal Oscillator), a varactor diode, and a few of standard passive elements to operate fully, satisfying almost all of the low power radio regulations. The LNA has a 1.56dB noise figure, 15.2dB power gain and 8dBm IIP3. The mixer has a 9.3dB SSB noise figure with 5dBm IIP3. The PLL achieves a phase noise of -99.7dBc/Hz at 100KHz offset with 433MHz carrier frequency. The RF receiver was implemented in a 0.8um, 12GHz f_T (NPN) Si BiCMOS production technology.