A Q-band CMOS LNA with common source topology based on algorithmic design methodologies

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

This work presents a low-noise amplifier (LNA), based on algorithmic design methodologies in 0.13μm technology. Spiral inductors were used in the on-chip impedance matching networks, rather than transmission lines. This three-stage common source LNA achieves the minimum noise figure of 4.97 dB at 45 GHz with a compact chip size of 0.62 mm2 (including all the testing pads). The 3-dB frequency bandwidth ranges from 42 to 50 GHz and the peak gain of 19 dB at 45 GHz. The whole circuit dissipates 27mW from 1.5-V supply.

Original languageEnglish
Title of host publicationProceedings - 2014 IEEE 12th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2014
EditorsJia Zhou, Ting-Ao Tang
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781479932962
DOIs
StatePublished - 23 Jan 2014
Event2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2014 - Guilin, China
Duration: 28 Oct 201431 Oct 2014

Publication series

NameProceedings - 2014 IEEE 12th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2014

Conference

Conference2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2014
Country/TerritoryChina
CityGuilin
Period28/10/1431/10/14

Keywords

  • Current density
  • F
  • F
  • Inductor
  • Low-noise amplifier (LNA)
  • Mm-wave

Fingerprint

Dive into the research topics of 'A Q-band CMOS LNA with common source topology based on algorithmic design methodologies'. Together they form a unique fingerprint.

Cite this