TY - GEN
T1 - A new stratified crossed stacked spiral inductor with improved self-resonance frequency
AU - Cai, Jing
AU - Li, Xi
AU - Zhu, Wentao
AU - Li, Xiaojin
AU - Ding, Quan
AU - Shi, Yanling
AU - Hu, Shaojian
PY - 2011
Y1 - 2011
N2 - A new stratified crossed structure to decrease the parasitic capacitance of stacked spiral inductor is proposed. By shifting the neighbor trace at same layer to the adjacent, the capacitances between the inductor's strips are effectively compressed. Hence, its self-resonance frequency and quality factor can be improved. In order to evaluate the performance of the proposed inductor, both the conventional and the proposed stacked spiral inductors have been simulated and compared by AnsoftTM HFSS. The results show that the self-resonant frequency (fSR) and maximum quality factor (Q) of the proposed 3.4-nH inductor have 87% and 15% improvements, respectively, compared with those of the conventional inductor. Meanwhile, the presented stratified crossed structure can be integrated into RF circuits based on conventional CMOS process. All analysis and results are valuable for optimizing on-chip stacked spiral inductors, especially for their application on high frequency circuits.
AB - A new stratified crossed structure to decrease the parasitic capacitance of stacked spiral inductor is proposed. By shifting the neighbor trace at same layer to the adjacent, the capacitances between the inductor's strips are effectively compressed. Hence, its self-resonance frequency and quality factor can be improved. In order to evaluate the performance of the proposed inductor, both the conventional and the proposed stacked spiral inductors have been simulated and compared by AnsoftTM HFSS. The results show that the self-resonant frequency (fSR) and maximum quality factor (Q) of the proposed 3.4-nH inductor have 87% and 15% improvements, respectively, compared with those of the conventional inductor. Meanwhile, the presented stratified crossed structure can be integrated into RF circuits based on conventional CMOS process. All analysis and results are valuable for optimizing on-chip stacked spiral inductors, especially for their application on high frequency circuits.
KW - parasitic capacitance
KW - quality factor
KW - self-resonance frequency
KW - stacked inductor
UR - https://www.scopus.com/pages/publications/81455148177
U2 - 10.1109/ICECC.2011.6066427
DO - 10.1109/ICECC.2011.6066427
M3 - 会议稿件
AN - SCOPUS:81455148177
SN - 9781457703218
T3 - 2011 International Conference on Electronics, Communications and Control, ICECC 2011 - Proceedings
SP - 1240
EP - 1243
BT - 2011 International Conference on Electronics, Communications and Control, ICECC 2011 - Proceedings
T2 - 2011 International Conference on Electronics, Communications and Control, ICECC 2011
Y2 - 9 September 2011 through 11 September 2011
ER -