A low-phase-noise frequency synthesizer for single-chip CMOS UHF RFID reader

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2 Scopus citations

Abstract

A novel fractional-N frequency synthesizer which is based on delta sigma modulator (DSM) and specialized for single-chip ultra-high frequency radio-frequency identification (UHF RFID) reader is proposed in this paper. The fractional-N synthesizer is implemented in 0.18μm CMOS process. The phase noise of the fractional-N synthesizer is approximately -109 dBc/Hz and -129 dBc/Hz at 200 kHz and 1 MHz offset from 900 MHz operating frequency while drawing 9.6 mA from 1.8 V power supply. The synthesizer is evaluated by implementing it in a direct conversion RF front-end. The front-end features a noise figure of 3.5 dB and an input-referred third-order intercept point of 5 dBm.

Original languageEnglish
Title of host publication2008 International Conference on Microwave and Millimeter Wave Technology Proceedings, ICMMT
Pages1477-1480
Number of pages4
DOIs
StatePublished - 2008
Event2008 International Conference on Microwave and Millimeter Wave Technology, ICMMT - Nanjing, China
Duration: 21 Apr 200824 Apr 2008

Publication series

Name2008 International Conference on Microwave and Millimeter Wave Technology Proceedings, ICMMT
Volume3

Conference

Conference2008 International Conference on Microwave and Millimeter Wave Technology, ICMMT
Country/TerritoryChina
CityNanjing
Period21/04/0824/04/08

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