A Low Noise High Linearity RF Front End Circuits Design

  • Yongsheng Xu*
  • , Shuzhen You
  • , Hui Yu
  • , Xiaojin Li
  • , Chunqi Shi
  • , Zongsheng Lai
  • *Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

1 Scopus citations

Abstract

One key design of UHF receiver IC, i.e. RF front end circuit, is described. From the aspects of noise matching, linearity, impedance matching and gain, the design methodology of the integrated low noise amplifier and downconversion mixer are presented in detail. The circuits have been fabricated with a 0.8 μm silicon BiCMOS process. The overall conversion gain of the front end is 18 dB, the double-sideband noise figure is 2.5 dB, the IIP3 is +5 dBm, and the circuit takes only 3.4 mA from a 5 V supply.

Original languageEnglish
Pages (from-to)188-193
Number of pages6
JournalGuti Dianzixue Yanjiu Yu Jinzhan/Research and Progress of Solid State Electronics
Volume26
Issue number2
StatePublished - May 2006

Keywords

  • Low noise amplifier
  • Mixer
  • RF front end
  • RFIC
  • UHF receiver IC

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