Abstract
One key design of UHF receiver IC, i.e. RF front end circuit, is described. From the aspects of noise matching, linearity, impedance matching and gain, the design methodology of the integrated low noise amplifier and downconversion mixer are presented in detail. The circuits have been fabricated with a 0.8 μm silicon BiCMOS process. The overall conversion gain of the front end is 18 dB, the double-sideband noise figure is 2.5 dB, the IIP3 is +5 dBm, and the circuit takes only 3.4 mA from a 5 V supply.
| Original language | English |
|---|---|
| Pages (from-to) | 188-193 |
| Number of pages | 6 |
| Journal | Guti Dianzixue Yanjiu Yu Jinzhan/Research and Progress of Solid State Electronics |
| Volume | 26 |
| Issue number | 2 |
| State | Published - May 2006 |
Keywords
- Low noise amplifier
- Mixer
- RF front end
- RFIC
- UHF receiver IC