A High-Linearity 14GHz 7b Phase Interpolator for Ultra-High-Speed Wireline Applications

Ninghuang Li; Weixin Gai; Bingyi Ye; Haowei Niu; Lei Lu

doi:10.1109/ISCAS48785.2022.9937934

A High-Linearity 14GHz 7b Phase Interpolator for Ultra-High-Speed Wireline Applications

Ninghuang Li
, Weixin Gai^*
, Bingyi Ye
, Haowei Niu
, Lei Lu

^*Corresponding author for this work

Peking University

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

4 Scopus citations

Abstract

A 14GHz CML-based phase interpolator (PI) is proposed for a 4-way time-interleaved 56Gbaud clock and data recovery (CDR). The phase interpolator has a resolution of 7 bits and is implemented in 28 nm CMOS technology with a 1.0V power supply. The proposed PI consists of a PI controller, a slew-rate-control buffer, and a phase mixer. The distribution of the tail current sources, short-channel effect, and the slew rate of the input signals are analyzed and several methods are proposed to optimize the interpolation linearity. The measured integral non-linearity (INL) and the calculated differential non-linearity (DNL) are less than 1.20 LSB and 0.27 LSB respectively at 14GHz. The total power consumption is 8.48mW.

Original language	English
Title of host publication	IEEE International Symposium on Circuits and Systems, ISCAS 2022
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	2487-2490
Number of pages	4
ISBN (Electronic)	9781665484855
DOIs	https://doi.org/10.1109/ISCAS48785.2022.9937934
State	Published - 2022
Externally published	Yes
Event	2022 IEEE International Symposium on Circuits and Systems, ISCAS 2022 - Austin, United States Duration: 27 May 2022 → 1 Jun 2022

Publication series

Name	Proceedings - IEEE International Symposium on Circuits and Systems
Volume	2022-May
ISSN (Print)	0271-4310

Conference

Conference	2022 IEEE International Symposium on Circuits and Systems, ISCAS 2022
Country/Territory	United States
City	Austin
Period	27/05/22 → 1/06/22

Keywords

CML-based phase interpolator (PI)
Clock and data recovery (CDR)
high-linearity

Access to Document

10.1109/ISCAS48785.2022.9937934

Cite this

Li, N., Gai, W., Ye, B., Niu, H., & Lu, L. (2022). A High-Linearity 14GHz 7b Phase Interpolator for Ultra-High-Speed Wireline Applications. In IEEE International Symposium on Circuits and Systems, ISCAS 2022 (pp. 2487-2490). (Proceedings - IEEE International Symposium on Circuits and Systems; Vol. 2022-May). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISCAS48785.2022.9937934

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title = "A High-Linearity 14GHz 7b Phase Interpolator for Ultra-High-Speed Wireline Applications",

abstract = "A 14GHz CML-based phase interpolator (PI) is proposed for a 4-way time-interleaved 56Gbaud clock and data recovery (CDR). The phase interpolator has a resolution of 7 bits and is implemented in 28 nm CMOS technology with a 1.0V power supply. The proposed PI consists of a PI controller, a slew-rate-control buffer, and a phase mixer. The distribution of the tail current sources, short-channel effect, and the slew rate of the input signals are analyzed and several methods are proposed to optimize the interpolation linearity. The measured integral non-linearity (INL) and the calculated differential non-linearity (DNL) are less than 1.20 LSB and 0.27 LSB respectively at 14GHz. The total power consumption is 8.48mW.",

keywords = "CML-based phase interpolator (PI), Clock and data recovery (CDR), high-linearity",

author = "Ninghuang Li and Weixin Gai and Bingyi Ye and Haowei Niu and Lei Lu",

note = "Publisher Copyright: {\textcopyright} 2022 IEEE.; 2022 IEEE International Symposium on Circuits and Systems, ISCAS 2022 ; Conference date: 27-05-2022 Through 01-06-2022",

year = "2022",

doi = "10.1109/ISCAS48785.2022.9937934",

language = "英语",

series = "Proceedings - IEEE International Symposium on Circuits and Systems",

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booktitle = "IEEE International Symposium on Circuits and Systems, ISCAS 2022",

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Li, N, Gai, W, Ye, B, Niu, H & Lu, L 2022, A High-Linearity 14GHz 7b Phase Interpolator for Ultra-High-Speed Wireline Applications. in IEEE International Symposium on Circuits and Systems, ISCAS 2022. Proceedings - IEEE International Symposium on Circuits and Systems, vol. 2022-May, Institute of Electrical and Electronics Engineers Inc., pp. 2487-2490, 2022 IEEE International Symposium on Circuits and Systems, ISCAS 2022, Austin, United States, 27/05/22. https://doi.org/10.1109/ISCAS48785.2022.9937934

A High-Linearity 14GHz 7b Phase Interpolator for Ultra-High-Speed Wireline Applications. / Li, Ninghuang; Gai, Weixin; Ye, Bingyi et al.
IEEE International Symposium on Circuits and Systems, ISCAS 2022. Institute of Electrical and Electronics Engineers Inc., 2022. p. 2487-2490 (Proceedings - IEEE International Symposium on Circuits and Systems; Vol. 2022-May).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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T1 - A High-Linearity 14GHz 7b Phase Interpolator for Ultra-High-Speed Wireline Applications

AU - Li, Ninghuang

AU - Gai, Weixin

AU - Ye, Bingyi

AU - Niu, Haowei

AU - Lu, Lei

PY - 2022

Y1 - 2022

N2 - A 14GHz CML-based phase interpolator (PI) is proposed for a 4-way time-interleaved 56Gbaud clock and data recovery (CDR). The phase interpolator has a resolution of 7 bits and is implemented in 28 nm CMOS technology with a 1.0V power supply. The proposed PI consists of a PI controller, a slew-rate-control buffer, and a phase mixer. The distribution of the tail current sources, short-channel effect, and the slew rate of the input signals are analyzed and several methods are proposed to optimize the interpolation linearity. The measured integral non-linearity (INL) and the calculated differential non-linearity (DNL) are less than 1.20 LSB and 0.27 LSB respectively at 14GHz. The total power consumption is 8.48mW.

AB - A 14GHz CML-based phase interpolator (PI) is proposed for a 4-way time-interleaved 56Gbaud clock and data recovery (CDR). The phase interpolator has a resolution of 7 bits and is implemented in 28 nm CMOS technology with a 1.0V power supply. The proposed PI consists of a PI controller, a slew-rate-control buffer, and a phase mixer. The distribution of the tail current sources, short-channel effect, and the slew rate of the input signals are analyzed and several methods are proposed to optimize the interpolation linearity. The measured integral non-linearity (INL) and the calculated differential non-linearity (DNL) are less than 1.20 LSB and 0.27 LSB respectively at 14GHz. The total power consumption is 8.48mW.

KW - CML-based phase interpolator (PI)

KW - Clock and data recovery (CDR)

KW - high-linearity

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BT - IEEE International Symposium on Circuits and Systems, ISCAS 2022

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Li N, Gai W, Ye B, Niu H, Lu L. A High-Linearity 14GHz 7b Phase Interpolator for Ultra-High-Speed Wireline Applications. In IEEE International Symposium on Circuits and Systems, ISCAS 2022. Institute of Electrical and Electronics Engineers Inc. 2022. p. 2487-2490. (Proceedings - IEEE International Symposium on Circuits and Systems). doi: 10.1109/ISCAS48785.2022.9937934

A High-Linearity 14GHz 7b Phase Interpolator for Ultra-High-Speed Wireline Applications

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