A High Accuracy and High Sensitivity System Architecture for Electrical Impedance Tomography System

Hui Li, Boxiao Liu, Yongfu Li, Guoxing Wang, Yong Lian

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

3 Scopus citations

Abstract

A high accuracy and high sensitivity system architecture is proposed for the read-out circuit of electrical impedance tomography system-on-chip. The switched ratio-metric technique is applied in the proposed architecture. The proposed system architecture minimizes the device noise by processing signals from both read-out electrodes and the stimulus. The quantized signals are post-processed in the digital processing unit for proper signal demodulation and impedance ratio calculation. Our proposed architecture improves the sensitivity of the read-out circuit, cancels out the gain fluctuations in the system, and overcomes the effects of motion artifacts on measurements.

Original languageEnglish
Title of host publication2018 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2018
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages155-158
Number of pages4
ISBN (Electronic)9781538682401
DOIs
StatePublished - 2 Jul 2018
Externally publishedYes
Event14th IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2018 - Chengdu, China
Duration: 26 Oct 201830 Oct 2018

Publication series

Name2018 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2018

Conference

Conference14th IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2018
Country/TerritoryChina
CityChengdu
Period26/10/1830/10/18

Keywords

  • electrical impedance tomography
  • gain fluctuations
  • high accuracy and high sensitivity read-out
  • motion artifacts
  • sensitivity
  • switched ratio-metric technique
  • system-on-chip

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