A fully monolithic 0.18 μm SiGe BiCMOS power amplifier design

Lei Chen; Ying Ruan; Jie Su; Shulin Zhang; Chunqi Shi; Zongsheng Lai

doi:10.1088/1674-4926/32/5/055005

A fully monolithic 0.18 μm SiGe BiCMOS power amplifier design

Lei Chen^*
, Ying Ruan
, Jie Su
, Shulin Zhang
, Chunqi Shi
, Zongsheng Lai

^*Corresponding author for this work

School of Communication and Electronic Engineering

East China Normal University

Research output: Contribution to journal › Article › peer-review

1 Scopus citations

Abstract

A fully monolithic power amplifier (PA) for multi-mode front end IC integration is presented. The PA is fabricated in an IBM 7WL 0.18 μm SiGe BiCMOS process with all the matching networks integrated on a chip. After load-pull test to find the best power stage size and layout optimization, the measured results show that the PA can obtain a 24 dBm maximum output power at 2.4 GHz, the output 1 dB compression point is 21 dBm at 5 dBm input, and the PAE is 18%. This PA is complete on-chip tested without any bonding wires and on-board matching, targeting fully power module integration in multi-mode system on chip.

Original language	English
Article number	055005
Journal	Journal of Semiconductors
Volume	32
Issue number	5
DOIs	https://doi.org/10.1088/1674-4926/32/5/055005
State	Published - May 2011

Keywords

BiCMOS
SiGe
monolithic
multi-mode
power amplifier

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10.1088/1674-4926/32/5/055005

Cite this

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title = "A fully monolithic 0.18 μm SiGe BiCMOS power amplifier design",

abstract = "A fully monolithic power amplifier (PA) for multi-mode front end IC integration is presented. The PA is fabricated in an IBM 7WL 0.18 μm SiGe BiCMOS process with all the matching networks integrated on a chip. After load-pull test to find the best power stage size and layout optimization, the measured results show that the PA can obtain a 24 dBm maximum output power at 2.4 GHz, the output 1 dB compression point is 21 dBm at 5 dBm input, and the PAE is 18\%. This PA is complete on-chip tested without any bonding wires and on-board matching, targeting fully power module integration in multi-mode system on chip.",

keywords = "BiCMOS, SiGe, monolithic, multi-mode, power amplifier",

author = "Lei Chen and Ying Ruan and Jie Su and Shulin Zhang and Chunqi Shi and Zongsheng Lai",

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AU - Chen, Lei

AU - Ruan, Ying

AU - Su, Jie

AU - Zhang, Shulin

AU - Shi, Chunqi

AU - Lai, Zongsheng

PY - 2011/5

Y1 - 2011/5

N2 - A fully monolithic power amplifier (PA) for multi-mode front end IC integration is presented. The PA is fabricated in an IBM 7WL 0.18 μm SiGe BiCMOS process with all the matching networks integrated on a chip. After load-pull test to find the best power stage size and layout optimization, the measured results show that the PA can obtain a 24 dBm maximum output power at 2.4 GHz, the output 1 dB compression point is 21 dBm at 5 dBm input, and the PAE is 18%. This PA is complete on-chip tested without any bonding wires and on-board matching, targeting fully power module integration in multi-mode system on chip.

AB - A fully monolithic power amplifier (PA) for multi-mode front end IC integration is presented. The PA is fabricated in an IBM 7WL 0.18 μm SiGe BiCMOS process with all the matching networks integrated on a chip. After load-pull test to find the best power stage size and layout optimization, the measured results show that the PA can obtain a 24 dBm maximum output power at 2.4 GHz, the output 1 dB compression point is 21 dBm at 5 dBm input, and the PAE is 18%. This PA is complete on-chip tested without any bonding wires and on-board matching, targeting fully power module integration in multi-mode system on chip.

KW - BiCMOS

KW - SiGe

KW - monolithic

KW - multi-mode

KW - power amplifier

UR - https://www.scopus.com/pages/publications/79958276480

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DO - 10.1088/1674-4926/32/5/055005

M3 - 文章

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JO - Journal of Semiconductors

JF - Journal of Semiconductors

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M1 - 055005

ER -

A fully monolithic 0.18 μm SiGe BiCMOS power amplifier design

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Keywords

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