A Dual-Loop Capacitor-Less NMOS LDO with Transient Enhancement Based on Voltage Comparison

Zhiyi Xie, Shengxi Diao

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

The paper presents an output capacitor-less Low Dropout Regulator(OCL-LDO) that combines dual-loop and transient enhancement based on voltage comparison to increase bandwidth and slew rate with low quiescent current of 20μA and small on-chip capacitance of 4.2pF. The LDO, implemented in the SMIC 0.18μm BCD technology, is fully integrated without load capacitor. It achieves a linear regulation of 1.4mV/V and a load regulation of 9.8mV/A, and ensures undershoot and overshoot of 220mV and 197mV during Iload transitions between 100μA and 100mA.

Original languageEnglish
Title of host publicationProceedings - 2024 17th International Congress on Image and Signal Processing, BioMedical Engineering and Informatics, CISP-BMEI 2024
EditorsQingli Li, Yan Wang, Lipo Wang
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9798331507398
DOIs
StatePublished - 2024
Event17th International Congress on Image and Signal Processing, BioMedical Engineering and Informatics, CISP-BMEI 2024 - Shanghai, China
Duration: 26 Oct 202428 Oct 2024

Publication series

NameProceedings - 2024 17th International Congress on Image and Signal Processing, BioMedical Engineering and Informatics, CISP-BMEI 2024

Conference

Conference17th International Congress on Image and Signal Processing, BioMedical Engineering and Informatics, CISP-BMEI 2024
Country/TerritoryChina
CityShanghai
Period26/10/2428/10/24

Keywords

  • capacitor-Iess NMOS LDO
  • dual-loop
  • transient enhancement

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