TY - GEN
T1 - A Configurable Hardware Accelerator Based on Hybrid Dataflow for Depthwise Separable Convolution
AU - Ou, Jiahua
AU - Li, Xiaojin
AU - Sun, Yabin
AU - Shi, Yanling
N1 - Publisher Copyright:
© 2022 IEEE.
PY - 2022
Y1 - 2022
N2 - As one of the most commonly used neural network models, the lightweight convolutional neural network has been widely adopted in the field of object detection, pattern recognition and so on. In order to achieve the real-time calculation in embedded system, the acceleration of depthwise separable convolution has become the focus of research in recent years. In this paper, a configurable hardware accelerator for depthwise separable convolution is proposed. The accelerator contains a high-speed dedicated processing engine array which can be configured to carry out depthwise convolution and pointwise convolution with high hardware utilization. The storage is fully utilized by applying hybrid scheduling strategies. Moreover, the design of MobileNet-V2 is validated on the platform of Zynq 7020, giving a high rate up to 186 frames/s.
AB - As one of the most commonly used neural network models, the lightweight convolutional neural network has been widely adopted in the field of object detection, pattern recognition and so on. In order to achieve the real-time calculation in embedded system, the acceleration of depthwise separable convolution has become the focus of research in recent years. In this paper, a configurable hardware accelerator for depthwise separable convolution is proposed. The accelerator contains a high-speed dedicated processing engine array which can be configured to carry out depthwise convolution and pointwise convolution with high hardware utilization. The storage is fully utilized by applying hybrid scheduling strategies. Moreover, the design of MobileNet-V2 is validated on the platform of Zynq 7020, giving a high rate up to 186 frames/s.
KW - configurable
KW - depthwise separable convolution
KW - hardware accelerator
UR - https://www.scopus.com/pages/publications/85136948732
U2 - 10.1109/CTISC54888.2022.9849816
DO - 10.1109/CTISC54888.2022.9849816
M3 - 会议稿件
AN - SCOPUS:85136948732
T3 - CTISC 2022 - 2022 4th International Conference on Advances in Computer Technology, Information Science and Communications
BT - CTISC 2022 - 2022 4th International Conference on Advances in Computer Technology, Information Science and Communications
A2 - Gerogianni, Vassilis C.
A2 - Yue, Yong
A2 - Kamareddine, Fairouz
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 4th International Conference on Advances in Computer Technology, Information Science and Communications, CTISC 2022
Y2 - 22 April 2022 through 24 April 2022
ER -