A channel-potential-based surface potential model and a turn-on DC channel-potential-based drain current model for fully-depleted poly-Si thin film transistors including tail and deep acceptor-like trap states in bulk

  • Zhen Zhu*
  • , Junhao Chu
  • *Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

1 Scopus citations

Abstract

For fully-depleted polycrystalline silicon thin film transistors including both tail and deep acceptor-like trap states in the bulk and interface charges, a channel-potential-based surface potential model (including front and back surface potential) and a turn-on DC channel-potential-based drain current model are proposed with the effect of the back surface potential considered. Firstly, a channel-potential-based surface potential model is obtained by introducing a channel-potential-based front and back surface potential equation and a channel-potential-based equation describing the coupling effect of the front and back surface potential. Contributions of active acceptors, electrons and trapped charges are all taken into account in this coupling effect. Moreover, by integrating the electron concentration, vertically to the front poly-Si/oxide interface, in the inversion layer, using the average electric field concept and considering the effect of channel potential in the potential of the inversion layer's ending point, the areal density of the inversion charge is deduced. Furthermore, a channel-potential-based drain current model, avoiding the double numerical integration, is developed with the merit of relative simplification in calculation. By using recursive Simpson rules, this drain current model is calculated by numerical integration with the examining condition. And the above proposed models are verified by 2D-device simulation from MEDICI.

Original languageEnglish
Article number2050023
JournalModern Physics Letters B
Volume34
Issue number2
DOIs
StatePublished - 20 Jan 2020

Keywords

  • Front and back surface potential model
  • average electric field
  • channel-potential-based
  • fully-depleted polycrystalline silicon thin film transistor
  • interface charge
  • numerical integration
  • tail and deep acceptor-like trap states in bulk
  • turn-on DC drain current model

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