A Capacitor-Free Low-Dropout Regulator with Low Line Regulation Rate and High Stability

Yimin Liang, Shengxi Diao

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

7 Scopus citations

Abstract

A Capacitor-Free Low-Dropout Regulator(LDO) for power adapter with an input voltage range of 8V∼24V is presented in this paper. The proposed LDO structure uses a high voltage to low voltage circuit (H2L) to convert the input voltage to a voltage less than 5V, effectively avoiding transistor breakdown and reducing line regulation rate. To solve the stability problem of capacitor-free LDO, the damping-factor-control(DFC) frequency compensation is adopted to enhance stability. The proposed LDO has been implemented in a 0.18um CMOS technology, and the active chip area is 220um∗120um(Without PAD). The maximum load current of the LDO is 100mA. The LDO ensures stability over a range of load variations from 0 to 100mA. The line regulation rate is 0.37mV/V.

Original languageEnglish
Title of host publicationProceedings - 2021 14th International Congress on Image and Signal Processing, BioMedical Engineering and Informatics, CISP-BMEI 2021
EditorsQingli Li, Lipo Wang, Yan Wang, Wenwu Li
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781665400039
DOIs
StatePublished - 2021
Event14th International Congress on Image and Signal Processing, BioMedical Engineering and Informatics, CISP-BMEI 2021 - Shanghai, China
Duration: 23 Oct 202125 Oct 2021

Publication series

NameProceedings - 2021 14th International Congress on Image and Signal Processing, BioMedical Engineering and Informatics, CISP-BMEI 2021

Conference

Conference14th International Congress on Image and Signal Processing, BioMedical Engineering and Informatics, CISP-BMEI 2021
Country/TerritoryChina
CityShanghai
Period23/10/2125/10/21

Keywords

  • damping-factor-control frequency compensation
  • high voltage to low voltage
  • wide input range

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