Abstract
A low power phase locked loop (PLL) based transmitter for wireless sensor application is presented in this paper. The transmitter adopts two-point modulation architecture in high-pass and low-pass paths of PLL; it modulates the divide ratio through sigma-delta modulator and voltage controlled oscillator (VCO) frequency tuning port simultaneously. An interleave-biased varactor pair is used to linearize the frequency tuning curve of the VCO. Besides, to achieve the desired frequency deviation of 500 kHz, we use a capacitance desensitization technique through combined parallel and serial capacitances with tuning varactors. This topology does not need the minimum size varactor, which is sensitive to process variation and mismatch. Implemented in standard 0.18-μm CMOS process, the transmitter achieves a 5.2 % FSK error for 2 Mbps data rate without using any auto-calibration circuit, consuming 7.8 mW power. Loop filter and crystal are the only off-chip components.
| Original language | English |
|---|---|
| Pages (from-to) | 273-282 |
| Number of pages | 10 |
| Journal | Analog Integrated Circuits and Signal Processing |
| Volume | 80 |
| Issue number | 2 |
| DOIs | |
| State | Published - Aug 2014 |
| Externally published | Yes |
Keywords
- FSK
- Fractional-N
- Low power
- Phase locked loop (PLL)
- Two-point modulation
- Wireless sensor