TY - GEN
T1 - A 99.5mW/Port DC-to-40GHz Integrated Channel Analyzer for High-Density Signal Integrity Measurement in 28nm CMOS
AU - Wu, Guangdong
AU - Li, Yuanliang
AU - Ye, Bingyi
AU - Li, Fangzhu
AU - Liu, Xin
AU - Niu, Haowei
AU - Wang, Ruixu
AU - Yu, Dunshan
AU - Gai, Weixin
N1 - Publisher Copyright:
© 2025 IEEE.
PY - 2025
Y1 - 2025
N2 - The growing demand for higher network bandwidth has led to a significant rise in channel density within Ethernet switches and high-performance computers. As data rates continue to climb, electrical links, such as printed circuit board (PCB) traces and coaxial cables, suffer from greater defects including reflection, crosstalk, and insertion loss. Therefore, low-power and highly efficient signal integrity (SI) measurements are crucial for detecting defects in communication equipment. Traditionally, vector network analyzers (VNAs) and sampling oscilloscopes with time-domain reflectometer modules are employed for SI measurement. However, these instruments are power-hungry, expensive, and inefficient because of the limited number of ports. This work presents an integrated channel analyzer (ICA) ASIC that utilizes time-domain reflectometry (TDR) and time-domain transmission (TDT) for SI measurements. The 4-port prototype achieves a frequency range of DC to 40GHz, a rise time of 9.1 ps, and consumes only 398mW.
AB - The growing demand for higher network bandwidth has led to a significant rise in channel density within Ethernet switches and high-performance computers. As data rates continue to climb, electrical links, such as printed circuit board (PCB) traces and coaxial cables, suffer from greater defects including reflection, crosstalk, and insertion loss. Therefore, low-power and highly efficient signal integrity (SI) measurements are crucial for detecting defects in communication equipment. Traditionally, vector network analyzers (VNAs) and sampling oscilloscopes with time-domain reflectometer modules are employed for SI measurement. However, these instruments are power-hungry, expensive, and inefficient because of the limited number of ports. This work presents an integrated channel analyzer (ICA) ASIC that utilizes time-domain reflectometry (TDR) and time-domain transmission (TDT) for SI measurements. The 4-port prototype achieves a frequency range of DC to 40GHz, a rise time of 9.1 ps, and consumes only 398mW.
UR - https://www.scopus.com/pages/publications/105000826301
U2 - 10.1109/ISSCC49661.2025.10904730
DO - 10.1109/ISSCC49661.2025.10904730
M3 - 会议稿件
AN - SCOPUS:105000826301
T3 - Digest of Technical Papers - IEEE International Solid-State Circuits Conference
SP - 454
EP - 456
BT - 2025 IEEE International Solid-State Circuits Conference, ISSCC 2025
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 72nd IEEE International Solid-State Circuits Conference, ISSCC 2025
Y2 - 16 February 2025 through 20 February 2025
ER -