TY - GEN
T1 - A 915MHz 97nW Low-Area Wake-Up Receiver with an Envelope-Tracking Mixer Achieving -73.2dBm Sensitivity
AU - Chen, Binbin
AU - Ren, Heyu
AU - Gong, Wenjun
AU - Lyu, Liangjian
AU - Shi, C. J.Richard
N1 - Publisher Copyright:
© 2025 IEEE.
PY - 2025
Y1 - 2025
N2 - This paper presents a 915MHz bit-level duty-cycled (BLDC) wake-up receiver (WuRX) designed for ultra-low-power Internet-of-Things (IoT) systems. Utilizing an envelope-tracking (ET) mixer, the WuRX generates a phase-following (PF) local oscillator (LO) from the incoming radio-frequency (RF) signals. The recovered PF LO has a low duty cycle of about 10% and aligns the peak and valley voltages of the RF signal. As a result, the on-off keying data is accurately downconverted to the baseband with improved gain. Moreover, the high-speed sampling capability of the ET mixer allows the receiver's front-end to operate at a low duty cycle of 0.024%, significantly lower than other mixer-based BLDC WuRXs. Dynamic baseband amplifiers with pre-charging and auto-zeroing abilities are employed to save area and reduce power consumption. Fabricated in a 65nm CMOS process, the proposed BLDC WuRX achieves a sensitivity of -73.2dBm at a 1kbps data rate, consuming only 97nW and occupying an ultra-low-area of 0.036mm2
AB - This paper presents a 915MHz bit-level duty-cycled (BLDC) wake-up receiver (WuRX) designed for ultra-low-power Internet-of-Things (IoT) systems. Utilizing an envelope-tracking (ET) mixer, the WuRX generates a phase-following (PF) local oscillator (LO) from the incoming radio-frequency (RF) signals. The recovered PF LO has a low duty cycle of about 10% and aligns the peak and valley voltages of the RF signal. As a result, the on-off keying data is accurately downconverted to the baseband with improved gain. Moreover, the high-speed sampling capability of the ET mixer allows the receiver's front-end to operate at a low duty cycle of 0.024%, significantly lower than other mixer-based BLDC WuRXs. Dynamic baseband amplifiers with pre-charging and auto-zeroing abilities are employed to save area and reduce power consumption. Fabricated in a 65nm CMOS process, the proposed BLDC WuRX achieves a sensitivity of -73.2dBm at a 1kbps data rate, consuming only 97nW and occupying an ultra-low-area of 0.036mm2
KW - Bit-level duty-cycled mode
KW - envelope-tracking(ET) mixer
KW - local oscillator recovery
KW - ultra-low-area
KW - ultra-low-power
KW - wake-up receiver(WuRX)
UR - https://www.scopus.com/pages/publications/105010629807
U2 - 10.1109/ISCAS56072.2025.11043883
DO - 10.1109/ISCAS56072.2025.11043883
M3 - 会议稿件
AN - SCOPUS:105010629807
T3 - Proceedings - IEEE International Symposium on Circuits and Systems
BT - ISCAS 2025 - IEEE International Symposium on Circuits and Systems, Proceedings
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2025 IEEE International Symposium on Circuits and Systems, ISCAS 2025
Y2 - 25 May 2025 through 28 May 2025
ER -