A 88%-Peak-Efficiency 10-mV-Voltage-Ripple Dual-Mode Switched-Capacitor DC-DC Converter for Ultra-Low-Power Battery Management

Xiaoyuan Wu, Yao Xiao, Zitong Zhang, Leilei Huang, Boxiao Liu, Chunqi Shi, Jinghong Chen, Runxi Zhang

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

3 Scopus citations

Abstract

This paper proposes a high-efficiency low-ripple dual-mode switched-capacitor (SC) DC-DC converter for low-power IoT and wearable device applications. A hybrid self-biased current scheme (HSBC) is developed to achieve low output voltage ripple and fast response. Two supply voltage domains of HSBC and clock drive controller circuit are introduced to reduce the power loss of the control circuit. An on-chip ultra-low-power bias circuit is also designed to minimize the power loss of the bias generator. The proposed DC-DC converter is implemented in a 40 nm CMOS process. Post-layout simulation results show that the converter realizes 1.6-1.8 V to 0.4 V conversion. The peak efficiency is up to 88% at 5μA, and the voltage ripple is less than 10 mV over a load range of 10 nA-10μA. The response time of the converter is less than 15μs.

Original languageEnglish
Title of host publicationISCAS 2023 - 56th IEEE International Symposium on Circuits and Systems, Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781665451093
DOIs
StatePublished - 2023
Event56th IEEE International Symposium on Circuits and Systems, ISCAS 2023 - Monterey, United States
Duration: 21 May 202325 May 2023

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
Volume2023-May
ISSN (Print)0271-4310

Conference

Conference56th IEEE International Symposium on Circuits and Systems, ISCAS 2023
Country/TerritoryUnited States
CityMonterey
Period21/05/2325/05/23

Keywords

  • low-power battery management
  • pulse-frequency modulation
  • switched-capacitor DC-DC converter

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