TY - GEN
T1 - A 7-Channel Bio-Signal Analog Front End Employing Single-End Chopping Amplifier Achieving 1.48 NEF
AU - Gan, Renze
AU - Lyu, Liangjian
AU - Richard Shi, C. J.
N1 - Publisher Copyright:
© 2023 IEEE.
PY - 2023
Y1 - 2023
N2 - This paper presents a high noise efficiency readout circuit for multi-channel bio-signal acquisition. The prototype is implemented in a 65 nm CMOS LP process, which achieves a power consumption of 2.06 μW/channel, a noise efficiency factor (NEF) of1.48, a common-mode rejection ratio (CMRR) of 105 dB at 50 Hz, and a crosstalk of -65dB by employing these new techniques, including 1) the use of single-ended amplifiers as the unit of low noise amplifier (LNA) for lower NEF, 2) single-end chopping techniques for single-ended amplifiers for suppressing low-frequency noise and offset, 3) digital-assisted DC servo loop (DDSL) for fast settling.
AB - This paper presents a high noise efficiency readout circuit for multi-channel bio-signal acquisition. The prototype is implemented in a 65 nm CMOS LP process, which achieves a power consumption of 2.06 μW/channel, a noise efficiency factor (NEF) of1.48, a common-mode rejection ratio (CMRR) of 105 dB at 50 Hz, and a crosstalk of -65dB by employing these new techniques, including 1) the use of single-ended amplifiers as the unit of low noise amplifier (LNA) for lower NEF, 2) single-end chopping techniques for single-ended amplifiers for suppressing low-frequency noise and offset, 3) digital-assisted DC servo loop (DDSL) for fast settling.
UR - https://www.scopus.com/pages/publications/85175266846
U2 - 10.1109/ESSCIRC59616.2023.10268787
DO - 10.1109/ESSCIRC59616.2023.10268787
M3 - 会议稿件
AN - SCOPUS:85175266846
T3 - European Solid-State Circuits Conference
SP - 5
EP - 8
BT - ESSCIRC 2023 - IEEE 49th European Solid State Circuits Conference
PB - IEEE Computer Society
T2 - 49th IEEE European Solid State Circuits Conference, ESSCIRC 2023
Y2 - 11 September 2023 through 14 September 2023
ER -