A 50Gb/s Burst-Mode NRZ Receiver with 5-Tap FFE, 7-Tap DFE and 15ns Lock Time in 28nm CMOS for Symmetric 50G-PON

Boyang Zhang, Tianchen Ye, Shuaizhe Ma, Tianyuan Zhong, Xin Liu, Feiyang Zhang, Bingyi Ye, Dan Li, Weixin Gai

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

With the growing demand for broadband services, the 50G passive optical network (PON) has become the future direction of optical access networks. As the baud rate rises to 50G, the limited bandwidth of photonic devices and chromatic dispersion degrade the signals more severely. In [1] a 41-tap feedforward equalization (FFE) is used to handle the complex inter-symbol interference (lSI). Meanwhile, in upstream PON, multiple optical network units (ONUs) transmit data to one optical line terminal (OLT) in burst mode, requiring OLTs to respond rapidly. In [2] a burst-mode receiver with 6.8ns CDR lock time is proposed, but it only adopted 1-tap decision-feedback equalization (DFE), which is inadequate to achieve reliable communication in a 50G-PON system. In addition, it utilized a p-i-n photodiode, in contrast to the avalanche photodiode (APD) preferred in ITU-T 50G-PON standards [3] due to its high conversion gain. However, APD and the low optical power in 50G-PON introduce more noise [4]. To achieve burst reception under large lSI and poor SNR in symmetric 50G-PON systems, this work proposes a 50Gb/s burst-mode NRZ Receiver in 28nm CMOS with 5-tap FFE including 3 pre taps and 1 post tap and 7-tap DFE including 4 floating taps ranging up to 16th post-cursor. Edge equalization is realized for accurate fast-lock, achieving a lock time of 15ns.

Original languageEnglish
Title of host publication2025 IEEE International Solid-State Circuits Conference, ISSCC 2025
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9798331541019
DOIs
StatePublished - 2025
Event72nd IEEE International Solid-State Circuits Conference, ISSCC 2025 - San Francisco, United States
Duration: 16 Feb 202520 Feb 2025

Publication series

NameDigest of Technical Papers - IEEE International Solid-State Circuits Conference
ISSN (Print)0193-6530

Conference

Conference72nd IEEE International Solid-State Circuits Conference, ISSCC 2025
Country/TerritoryUnited States
CitySan Francisco
Period16/02/2520/02/25

Fingerprint

Dive into the research topics of 'A 50Gb/s Burst-Mode NRZ Receiver with 5-Tap FFE, 7-Tap DFE and 15ns Lock Time in 28nm CMOS for Symmetric 50G-PON'. Together they form a unique fingerprint.

Cite this