A 4K60fps Ultra-Low-Latency Light Compression Encoder for Bandwidth-Constrained Scenarios

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

Light compression standards are developed for low latency video transmission requirements. However, the compression ratio (CR) of most of the light compression standards is not enough for bandwidth-constrained scenarios. The limited CR leads to an increase in cache, which in turn affects latency and area. In this paper, we address to propose a high efficient light compression algorithm with a CR of 20. We implemented the proposed design on Xilinx ZCU102 FPGA. As a result, the codec system has an end-to-end latency of 250.76us with a 150MHz clock.

Original languageEnglish
Title of host publication2024 IEEE 17th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2024
EditorsFan Ye, Xiaona Zhu, Ting Ao Tang
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9798350361834
DOIs
StatePublished - 2024
Externally publishedYes
Event17th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2024 - Zhuhai, China
Duration: 22 Oct 202425 Oct 2024

Publication series

Name2024 IEEE 17th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2024

Conference

Conference17th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2024
Country/TerritoryChina
CityZhuhai
Period22/10/2425/10/24

Keywords

  • HEVC
  • JPEG-XS
  • Light compression
  • limited bandwidth
  • low latency
  • rate control
  • visual lossless

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