A 340nW/channel neural recording analog front-end using replica-biasing LNAs to tolerate 200mvpp interfere from 350MV power supply

Liangjian Lyu; Dawei Ye; C. J. Richard Shi

doi:10.1109/ISCAS.2019.8702781

A 340nW/channel neural recording analog front-end using replica-biasing LNAs to tolerate 200mv_pp interfere from 350MV power supply

Liangjian Lyu, Dawei Ye, C. J. Richard Shi

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

8 Scopus citations

Abstract

This paper presents an 8-channel power-efficient neural recording analog front-end (AFE) with high power-supply rejection ratio (PSRR) and wide dynamic range. The ultra-low power is achieved by using a low supply voltage current-reusing input stage in the low noise amplifier (LNA). In order to improve the PSRR in low supply voltage amplifiers, we propose a replica biasing circuit to generate the biasing current, which is insensitive to the supply noise. Furthermore, the dynamic range is enlarged by utilizing an averaged local field potential (A-LFP) feedback loop. The prototype is fabricated in a 65nm CMOS process. Each channel of the AFE occupies 0.04mm² and only consumes 340nW from 0.35V/0.7V dual supply. The AFE provides a maximum gain of 54dB with 6.7μV input-referred noise integrating from 0.5Hz to 6.5 kHz. The proposed 0.35V input stage can tolerate a supply interferer up to 200mVpp, while maintaining a PSRR of 74dB.

Original language	English
Title of host publication	2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781728103976
DOIs	https://doi.org/10.1109/ISCAS.2019.8702781
State	Published - 2019
Externally published	Yes
Event	2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Sapporo, Japan Duration: 26 May 2019 → 29 May 2019

Publication series

Name	Proceedings - IEEE International Symposium on Circuits and Systems
Volume	2019-May
ISSN (Print)	0271-4310

Conference

Conference	2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019
Country/Territory	Japan
City	Sapporo
Period	26/05/19 → 29/05/19

Keywords

Active potential
Local field potential
Low noise
Low power
Neural recorder
PSRR

Access to Document

10.1109/ISCAS.2019.8702781

Cite this

Lyu, L., Ye, D., & Richard Shi, C. J. (2019). A 340nW/channel neural recording analog front-end using replica-biasing LNAs to tolerate 200mv_pp interfere from 350MV power supply. In 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings Article 8702781 (Proceedings - IEEE International Symposium on Circuits and Systems; Vol. 2019-May). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISCAS.2019.8702781

Lyu, Liangjian ; Ye, Dawei ; Richard Shi, C. J. / A 340nW/channel neural recording analog front-end using replica-biasing LNAs to tolerate 200mv_pp interfere from 350MV power supply. 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2019. (Proceedings - IEEE International Symposium on Circuits and Systems).

@inproceedings{25ca32ea4a1f46e98462cb8dcd79df6f,

title = "A 340nW/channel neural recording analog front-end using replica-biasing LNAs to tolerate 200mvpp interfere from 350MV power supply",

abstract = "This paper presents an 8-channel power-efficient neural recording analog front-end (AFE) with high power-supply rejection ratio (PSRR) and wide dynamic range. The ultra-low power is achieved by using a low supply voltage current-reusing input stage in the low noise amplifier (LNA). In order to improve the PSRR in low supply voltage amplifiers, we propose a replica biasing circuit to generate the biasing current, which is insensitive to the supply noise. Furthermore, the dynamic range is enlarged by utilizing an averaged local field potential (A-LFP) feedback loop. The prototype is fabricated in a 65nm CMOS process. Each channel of the AFE occupies 0.04mm2 and only consumes 340nW from 0.35V/0.7V dual supply. The AFE provides a maximum gain of 54dB with 6.7μV input-referred noise integrating from 0.5Hz to 6.5 kHz. The proposed 0.35V input stage can tolerate a supply interferer up to 200mVpp, while maintaining a PSRR of 74dB.",

keywords = "Active potential, Local field potential, Low noise, Low power, Neural recorder, PSRR",

author = "Liangjian Lyu and Dawei Ye and \{Richard Shi\}, \{C. J.\}",

note = "Publisher Copyright: {\textcopyright} 2019 IEEE; 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 ; Conference date: 26-05-2019 Through 29-05-2019",

year = "2019",

doi = "10.1109/ISCAS.2019.8702781",

language = "英语",

series = "Proceedings - IEEE International Symposium on Circuits and Systems",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

booktitle = "2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings",

address = "美国",

}

Lyu, L, Ye, D & Richard Shi, CJ 2019, A 340nW/channel neural recording analog front-end using replica-biasing LNAs to tolerate 200mv_pp interfere from 350MV power supply. in 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings., 8702781, Proceedings - IEEE International Symposium on Circuits and Systems, vol. 2019-May, Institute of Electrical and Electronics Engineers Inc., 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019, Sapporo, Japan, 26/05/19. https://doi.org/10.1109/ISCAS.2019.8702781

A 340nW/channel neural recording analog front-end using replica-biasing LNAs to tolerate 200mv_pp interfere from 350MV power supply. / Lyu, Liangjian; Ye, Dawei; Richard Shi, C. J.
2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2019. 8702781 (Proceedings - IEEE International Symposium on Circuits and Systems; Vol. 2019-May).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - A 340nW/channel neural recording analog front-end using replica-biasing LNAs to tolerate 200mvpp interfere from 350MV power supply

AU - Lyu, Liangjian

AU - Ye, Dawei

AU - Richard Shi, C. J.

PY - 2019

Y1 - 2019

N2 - This paper presents an 8-channel power-efficient neural recording analog front-end (AFE) with high power-supply rejection ratio (PSRR) and wide dynamic range. The ultra-low power is achieved by using a low supply voltage current-reusing input stage in the low noise amplifier (LNA). In order to improve the PSRR in low supply voltage amplifiers, we propose a replica biasing circuit to generate the biasing current, which is insensitive to the supply noise. Furthermore, the dynamic range is enlarged by utilizing an averaged local field potential (A-LFP) feedback loop. The prototype is fabricated in a 65nm CMOS process. Each channel of the AFE occupies 0.04mm2 and only consumes 340nW from 0.35V/0.7V dual supply. The AFE provides a maximum gain of 54dB with 6.7μV input-referred noise integrating from 0.5Hz to 6.5 kHz. The proposed 0.35V input stage can tolerate a supply interferer up to 200mVpp, while maintaining a PSRR of 74dB.

AB - This paper presents an 8-channel power-efficient neural recording analog front-end (AFE) with high power-supply rejection ratio (PSRR) and wide dynamic range. The ultra-low power is achieved by using a low supply voltage current-reusing input stage in the low noise amplifier (LNA). In order to improve the PSRR in low supply voltage amplifiers, we propose a replica biasing circuit to generate the biasing current, which is insensitive to the supply noise. Furthermore, the dynamic range is enlarged by utilizing an averaged local field potential (A-LFP) feedback loop. The prototype is fabricated in a 65nm CMOS process. Each channel of the AFE occupies 0.04mm2 and only consumes 340nW from 0.35V/0.7V dual supply. The AFE provides a maximum gain of 54dB with 6.7μV input-referred noise integrating from 0.5Hz to 6.5 kHz. The proposed 0.35V input stage can tolerate a supply interferer up to 200mVpp, while maintaining a PSRR of 74dB.

KW - Active potential

KW - Local field potential

KW - Low noise

KW - Low power

KW - Neural recorder

KW - PSRR

UR - https://www.scopus.com/pages/publications/85066810382

U2 - 10.1109/ISCAS.2019.8702781

DO - 10.1109/ISCAS.2019.8702781

M3 - 会议稿件

AN - SCOPUS:85066810382

T3 - Proceedings - IEEE International Symposium on Circuits and Systems

BT - 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019

Y2 - 26 May 2019 through 29 May 2019

ER -

Lyu L, Ye D, Richard Shi CJ. A 340nW/channel neural recording analog front-end using replica-biasing LNAs to tolerate 200mv_pp interfere from 350MV power supply. In 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings. Institute of Electrical and Electronics Engineers Inc. 2019. 8702781. (Proceedings - IEEE International Symposium on Circuits and Systems). doi: 10.1109/ISCAS.2019.8702781