A 20–25 GHz Transformer-Based Improved Multipath Noise-Canceling LNA With 2 dB Minimum NF in 40-nm CMOS

This article presents a 20-25-GHz low-noise amplifier (LNA) based on a transformer-assisted improved multipath noise-canceling (IMNC) architecture. The proposed approach addresses key limitations of the conventional dual-path noise-canceling (DPNC) technique, which utilizes common-source (CS) and common-gate (CG) stages to suppress each other’s noise. In the DPNC topology, noise from the CG stage is not fully eliminated, and increasing the CG transistor’s transconductance to enhance CS-stage noise cancellation introduces a tradeoff between noise performance and power consumption. To overcome these limitations, the IMNC architecture utilizes a three-coil transformer to boost the CG stage gain, thereby improving the CS noise cancellation without additional power consumption. Furthermore, the transformer introduces an auxiliary noise-canceling path that enables partial self-cancellation of the CG stage noise. These enhancements result in improved noise performance and power efficiency compared to the conventional DPNC approach. Fabricated in a 40-nm CMOS process, the proposed IMNC-based LNA achieves a peak gain of 14.5 dB, a 3-dB bandwidth of 5.1 GHz spanning 19.9–25 GHz, and a minimum noise figure (NF) of 2.0 dB, while consuming 22.4 mW of power and occupying a core area of 0.16