A 1mW CMOS limiting amplifier and RSSI for ZigBee™ applications

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

7 Scopus citations

Abstract

This paper presents a low-power intermediate frequency (IF) limiting amplifier (LA) and received signal strength indicator (RSSI). The LA and RSSI are designed for ZigBee™ receiver at 2MHz IF. To save power, two local loops for offset correction are used in LA chain and a sensitivity of -56dBm is achieved. Each LA gain stage employs cascade diodes load to avoid driving the diode load into velocity saturation region. The indication rang is 50dB within ±2dB linearity error. The core area is 0.11×0.31mm2 using a SMIC 0.18-μm CMOS technology. The overall power consumption is 1mW from a 1.8V supply voltage.

Original languageEnglish
Title of host publication2013 IEEE International Wireless Symposium, IWS 2013
DOIs
StatePublished - 2013
Externally publishedYes
Event2013 IEEE International Wireless Symposium, IWS 2013 - Beijing, China
Duration: 14 Apr 201318 Apr 2013

Publication series

Name2013 IEEE International Wireless Symposium, IWS 2013

Conference

Conference2013 IEEE International Wireless Symposium, IWS 2013
Country/TerritoryChina
CityBeijing
Period14/04/1318/04/13

Keywords

  • CMOS
  • IF
  • Limiting amplifier
  • RSSI
  • ZigBeeTM
  • low power

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