A 12 nA Ultra-Low Quiescent Current Capacitor-Less LDO with 350 ns Fast Transient Response

Nixiao Yan, Xin Zhang, Chunqi Shi, Leilei Huang, Guangsheng Chen, Runxi Zhang

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

5 Scopus citations

Abstract

This paper presents an output capacitor-less, dual power transistors low-dropout (LDO) regulator with ultra-low quiescent current in 55 nm CMOS process. The LDO employs an adaptive stage to make the LDO a two-stage topology at light load and a three-stage topology at heavy load. A co-enhanced transient circuit is introduced by adding the extra switching current to improve the slew rate without any quiescent current. The simulated results show that the LDO with a quiescent current of 12 nA and a power supply range from 2.5 to 3.6 V achieves a stable 1.2 V output. When the load current changes in steps of 10 μ A -20 mA with a rise time and a fall time of 200 ns, the LDO can recover within 350 ns and 490 ns.

Original languageEnglish
Title of host publication2022 IEEE 4th International Conference on Circuits and Systems, ICCS 2022
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages95-98
Number of pages4
ISBN (Electronic)9781665460361
DOIs
StatePublished - 2022
Event4th IEEE International Conference on Circuits and Systems, ICCS 2022 - Chengdu, China
Duration: 23 Sep 202226 Sep 2022

Publication series

Name2022 IEEE 4th International Conference on Circuits and Systems, ICCS 2022

Conference

Conference4th IEEE International Conference on Circuits and Systems, ICCS 2022
Country/TerritoryChina
CityChengdu
Period23/09/2226/09/22

Keywords

  • capacitor-less low-dropout (CL-LDO) regulator
  • settling time
  • transient response
  • ultra-low quiescent current

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