A 112Gb/s/wire Single-Ended Simultaneous Bi-Directional Transceiver with Dynamic Equalizer for Die-to-Die Interface in 28nm CMOS

Zhiwen Huang; Zhifei Wang; Bingyi Ye; Tianchen Ye; Dunshan Yu; Wei Wang; Weixin Gai

doi:10.1109/ISSCC49663.2026.11409095

A 112Gb/s/wire Single-Ended Simultaneous Bi-Directional Transceiver with Dynamic Equalizer for Die-to-Die Interface in 28nm CMOS

Zhiwen Huang
, Zhifei Wang
, Bingyi Ye
, Tianchen Ye
, Dunshan Yu
, Wei Wang
, Weixin Gai

School of Communication and Electronic Engineering

Peking University
Beijing Advanced Innovation Center for Integrated Circuits

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

This work presents an 8-lane 112Gb/s/wire single-ended simultaneous bi-directional transceiver with a 3mm shield-less on-chip channel. A dynamic equalizer is proposed to decouple the bi-directional signals, and compensate for insertion loss and crosstalk. Fabricated in 28nm CMOS, the transceiver achieves a BER of less than 10^-14, and an energy efficiency of 1.01pJ/b.

Original language	English
Title of host publication	2026 IEEE International Solid-State Circuits Conference, ISSCC 2026
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	140-142
Number of pages	3
ISBN (Electronic)	9798331589363
DOIs	https://doi.org/10.1109/ISSCC49663.2026.11409095
State	Published - 2026
Event	2026 IEEE International Solid-State Circuits Conference, ISSCC 2026 - San Francisco, United States Duration: 15 Feb 2026 → 19 Feb 2026

Publication series

Name	Digest of Technical Papers - IEEE International Solid-State Circuits Conference
Volume	69
ISSN (Print)	0193-6530

Conference

Conference	2026 IEEE International Solid-State Circuits Conference, ISSCC 2026
Country/Territory	United States
City	San Francisco
Period	15/02/26 → 19/02/26

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

SDG 7 Affordable and Clean Energy

Access to Document

10.1109/ISSCC49663.2026.11409095

Cite this

Huang, Z., Wang, Z., Ye, B., Ye, T., Yu, D., Wang, W., & Gai, W. (2026). A 112Gb/s/wire Single-Ended Simultaneous Bi-Directional Transceiver with Dynamic Equalizer for Die-to-Die Interface in 28nm CMOS. In 2026 IEEE International Solid-State Circuits Conference, ISSCC 2026 (pp. 140-142). (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; Vol. 69). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISSCC49663.2026.11409095

Huang, Zhiwen ; Wang, Zhifei ; Ye, Bingyi et al. / A 112Gb/s/wire Single-Ended Simultaneous Bi-Directional Transceiver with Dynamic Equalizer for Die-to-Die Interface in 28nm CMOS. 2026 IEEE International Solid-State Circuits Conference, ISSCC 2026. Institute of Electrical and Electronics Engineers Inc., 2026. pp. 140-142 (Digest of Technical Papers - IEEE International Solid-State Circuits Conference).

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title = "A 112Gb/s/wire Single-Ended Simultaneous Bi-Directional Transceiver with Dynamic Equalizer for Die-to-Die Interface in 28nm CMOS",

abstract = "This work presents an 8-lane 112Gb/s/wire single-ended simultaneous bi-directional transceiver with a 3mm shield-less on-chip channel. A dynamic equalizer is proposed to decouple the bi-directional signals, and compensate for insertion loss and crosstalk. Fabricated in 28nm CMOS, the transceiver achieves a BER of less than 10-14, and an energy efficiency of 1.01pJ/b.",

author = "Zhiwen Huang and Zhifei Wang and Bingyi Ye and Tianchen Ye and Dunshan Yu and Wei Wang and Weixin Gai",

note = "Publisher Copyright: {\textcopyright} 2026 IEEE.; 2026 IEEE International Solid-State Circuits Conference, ISSCC 2026 ; Conference date: 15-02-2026 Through 19-02-2026",

year = "2026",

doi = "10.1109/ISSCC49663.2026.11409095",

language = "英语",

series = "Digest of Technical Papers - IEEE International Solid-State Circuits Conference",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

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booktitle = "2026 IEEE International Solid-State Circuits Conference, ISSCC 2026",

address = "美国",

}

Huang, Z, Wang, Z, Ye, B, Ye, T, Yu, D, Wang, W & Gai, W 2026, A 112Gb/s/wire Single-Ended Simultaneous Bi-Directional Transceiver with Dynamic Equalizer for Die-to-Die Interface in 28nm CMOS. in 2026 IEEE International Solid-State Circuits Conference, ISSCC 2026. Digest of Technical Papers - IEEE International Solid-State Circuits Conference, vol. 69, Institute of Electrical and Electronics Engineers Inc., pp. 140-142, 2026 IEEE International Solid-State Circuits Conference, ISSCC 2026, San Francisco, United States, 15/02/26. https://doi.org/10.1109/ISSCC49663.2026.11409095

A 112Gb/s/wire Single-Ended Simultaneous Bi-Directional Transceiver with Dynamic Equalizer for Die-to-Die Interface in 28nm CMOS. / Huang, Zhiwen; Wang, Zhifei; Ye, Bingyi et al.
2026 IEEE International Solid-State Circuits Conference, ISSCC 2026. Institute of Electrical and Electronics Engineers Inc., 2026. p. 140-142 (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; Vol. 69).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Huang, Zhiwen

AU - Wang, Zhifei

AU - Ye, Bingyi

AU - Ye, Tianchen

AU - Yu, Dunshan

AU - Wang, Wei

AU - Gai, Weixin

PY - 2026

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AB - This work presents an 8-lane 112Gb/s/wire single-ended simultaneous bi-directional transceiver with a 3mm shield-less on-chip channel. A dynamic equalizer is proposed to decouple the bi-directional signals, and compensate for insertion loss and crosstalk. Fabricated in 28nm CMOS, the transceiver achieves a BER of less than 10-14, and an energy efficiency of 1.01pJ/b.

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DO - 10.1109/ISSCC49663.2026.11409095

M3 - 会议稿件

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T3 - Digest of Technical Papers - IEEE International Solid-State Circuits Conference

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BT - 2026 IEEE International Solid-State Circuits Conference, ISSCC 2026

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2026 IEEE International Solid-State Circuits Conference, ISSCC 2026

Y2 - 15 February 2026 through 19 February 2026

ER -

Huang Z, Wang Z, Ye B, Ye T, Yu D, Wang W et al. A 112Gb/s/wire Single-Ended Simultaneous Bi-Directional Transceiver with Dynamic Equalizer for Die-to-Die Interface in 28nm CMOS. In 2026 IEEE International Solid-State Circuits Conference, ISSCC 2026. Institute of Electrical and Electronics Engineers Inc. 2026. p. 140-142. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference). doi: 10.1109/ISSCC49663.2026.11409095

A 112Gb/s/wire Single-Ended Simultaneous Bi-Directional Transceiver with Dynamic Equalizer for Die-to-Die Interface in 28nm CMOS

Abstract

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UN SDGs

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