A 112dB SNDR Delta-Sigma Modulator for Low-Power Audio Applications

Lvkun Qian, Shengxi Diao

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

3 Scopus citations

Abstract

This paper presents a discrete-time fourth-order single-bit delta-sigma modulator for audio applications. The modulator is implemented in 0.18 um CMOS technology using fully differential switch-capacitor cascade of integrators feedback (CIFB) architecture. The modulator achieves a 112 dB peak Signal to Noise and Distortion Ratio (SNDR) in 20-kHz signal bandwidth with a sampling frequency of 5.12MHz. The power consumption of the proposed modulator core is 3.9 mW at a supply voltage of 1.8 V.

Original languageEnglish
Title of host publicationProceedings - 2021 14th International Congress on Image and Signal Processing, BioMedical Engineering and Informatics, CISP-BMEI 2021
EditorsQingli Li, Lipo Wang, Yan Wang, Wenwu Li
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781665400039
DOIs
StatePublished - 2021
Event14th International Congress on Image and Signal Processing, BioMedical Engineering and Informatics, CISP-BMEI 2021 - Shanghai, China
Duration: 23 Oct 202125 Oct 2021

Publication series

NameProceedings - 2021 14th International Congress on Image and Signal Processing, BioMedical Engineering and Informatics, CISP-BMEI 2021

Conference

Conference14th International Congress on Image and Signal Processing, BioMedical Engineering and Informatics, CISP-BMEI 2021
Country/TerritoryChina
CityShanghai
Period23/10/2125/10/21

Keywords

  • Delta-sigma modulator
  • analog-to-digital converter
  • oversampling
  • switch-capacitor circuit

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