一款应用于 802.11ax 的 5.3~7.4 GHz CMOS 低噪声放大器设计

Translated title of the contribution: A 5.3-7.4 GHz CMOS LNA Design for 802.11ax Applications

Xinyi Jiang, Chunqi Shi, Leilei Huang, Long Xu, Runxi Zhang

Research output: Contribution to journalArticlepeer-review

Abstract

To fulfill the requirements for low noise and wide bandwidth in IEEE 802.11ax applications,a wideband low noise amplifier(LNA)operating at 5.3-7.4 GHz was designed. By utilizing a passive transformer for noise cancellation,the noise figure is improved by 0.27 dB compared to non-cancellation designs,without increasing power consumption. The device incorporated a switched capacitor array for a tunable inter-stage network,providing 700 MHz sub-band and 2.1 GHz overall tuning bandwidths. Additionally,a wideband output matching network was designed based on the constant-Q circle strategy. Fabricated in 22 nm CMOS process,the chip testing results demonstrate a 3 dB bandwidth of 2.1 GHz and a peak gain of 26.5 dB. Furthermore,the noise figure remains below 2.53 dB,and the gain exceeds 23 dB across the entire 5.3 to 7.4 GHz spectrum,with a power consumption of 43 mW.

Translated title of the contributionA 5.3-7.4 GHz CMOS LNA Design for 802.11ax Applications
Original languageChinese (Traditional)
Article number010301
JournalGuti Dianzixue Yanjiu Yu Jinzhan/Research and Progress of Solid State Electronics
Volume45
Issue number1
DOIs
StatePublished - Feb 2025

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